 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| DS1724 programmable analog/ digital thermometer DS1724 preliminary 071698 1/17 features ? temperature measurements require no external com- ponents ? digital output temperatures measure from 55 c to +125 c. fahrenheit equivalent is 67 f to +257 f ? temperature is read as a 9bit digital value (0.5 c increments) ? analog volatge output is available for temperatures from 25 c to +100 c. fahrenheit equivalent is 13 f to +212 f ? temperature is read as a 10bit analog voltage (5 mv increments) defined by a userprogrammable eeprom lookuptable ? voltage ouptut measures +1.280v to +6.395v ? converts temperature to digital word and analog volt- age in 1 second (max) ? digital data is read/written via a 1wire tm serial inter- face ? applications include temperaturecompensated crystal oscillators for test equipment and radio sys- tems ? 8pin soic (xxxmil) package pin assignment gnd v dd nc nc dq c c+ v o 1 2 3 4 8 7 6 5 DS1724s 8pin soic (xxx mil) pin description dq digital data in/out v dd 2.7v 5.5v power supply gnd ground v o analog voltage out c+ positive polarity of filter cap c negative polarity of filter cap nc no connect description the DS1724 programmable analog/digital thermome- ter provides a directtodigital temperature reading with no external components required. furthermore, a userprogrammable eeprom lookuptable (lut) defines an analog voltage output based on the mea- sured temperature. digital data is written/read over a simple 1wire interface, minimizing required board traces. applications for the DS1724 include temperaturecom- pensated crystal oscillators (tcxos) in test and radio equipment. the presence of an analog and digital inter- face allow the user to compensate for temperaturede- pendent shifts in frequency in nearly real time. the small outline surface mount package allows the DS1724 to be in close proximity to the crystal, while con- suming a minimal amount of board space.
DS1724 071698 2/17 detailed pin description table 1 pin symbol description 1 dq digital data in/out for 1wire programming and digital temperature data extraction. 2 nc nc connect. 3 nc nc connect. 4 gnd ground. 5 v o analog voltage out represents measured temperature as defined by eeprom lut. 6 c negative polarity of filter cap optional filter cap connection to reduce v o leakage. 7 c+ positive polarity of filter cap optional filter cap connection to reduce v o leakage. 8 v dd supply voltage 2.7v to 5.5v input power pin. overview a block diagram of the DS1724 is shown in figure 1. the DS1724 consists of three major components: 1. directtodigital temperature sensor 2. 2.57 kbit eeprom lut 3. digitaltoanalog converter the factorycalibrated directtodigital temperature sensor requires no external components. a function command initializes temperature conversions, and the 9bit result can be read over the 1wire serial interface with another function protocol. the DS1724 can be con- figured to continuously perform conversions, always storing the last completed result in the temperature reg- ister, or perform a measurement only when commanded to do so. this is a useful feature in powersensitive applications. the other major feature of the DS1724 is an analog volt- age output that represents the measured temperature as defined by a 2.57 kbit userprogrammable eeprom lookuptable (lut). therefore, any v vs. t profile can be achieved by programming the required map in the eeprom memory space. because it is eeprom, the profile map maintains its program during the absence or cycling of the 2.7v 5.5v power supply. therefore, the map can be preprogrammed once before insertion in the final application, or the profile can be interactively altered in the final application to account for a changing environment. the analog voltage output can be programmed to range from 1.280 to 6.395v with a 10bit resolution, yielding a step size of approximately 5 mv. each 0.5 c tempera- ture increment of the lut is programmed with a 10bit word, representing the binary equivalent of the desired voltage for that temperature. therefore, the best resolu- tion possible with the analog output is approximately 10mv/ c. the range of operation for the analog to volt- age output of the DS1724 is between 25 c and +100 c. digital data is written to/read from the DS1724 via a 1wire interface, and all communication is lsb first. DS1724 071698 3/17 DS1724 functional block diagram figure 1 device status/ configuration 1wire interface and contorl logic 80 bit scratchpad space temperature sensor a/d converter 2.57 kbit eeprom lut voltage regulator d/a converter to host dq v dd gnd 2.7v 5.5v regulated supply c+ c v o c f + analog output internal v dd internal gnd operationdigital temperature sensor the core of DS1724 functionality is its directtodigital temperature sensor. the DS1724 measures tempera- ture through the use of an onboard proprietary temper- ature measurement technique with an operating range from 55 c to +125 c. temperature conversions are initiated with the start convert t (eeh) protocol (see amemory function commandso section), and the 9bit result is latched in a register. the device can be config- ured to perform a single conversion, store the result, and return to a standby mode. or, conversions can be performed continuously following the command proto- col to start the first measurement; in this mode of opera- tion, the last completed conversion is stored in the tem- perature register. regardless of the mode used, the digital temperature can be retrieved from the tempera- ture register using the read temperature (aah) proto- col, as described in detail in the amemory function com- mando section. details on how to define the operating mode of the DS1724 are contained in the aopera- tionprogrammingo section. the thermal sensing algorithm of the DS1724 provides a 0.5 c resolution. the temperature reading is provided in a 9bit, two's complement reading by issuing a read temperature command. table 2 describes the exact relationship of output data to measured temperature. the data is transmitted serially through the 1wire serial interface, lsb first. the msb of the temperature register contains the asigno (s) bit, denoting whether the temperature is positive or negative. the DS1724 can measure temperature over the range of 55 c to +125 c in 0.5 c increments. for fahrenheit usage, a lookup table or conversion factor must be used. temperature/data relationships table 2 s msb lsb (unit = c) 2 6 2 5 2 4 2 3 2 2 2 1 2 0 2 1 lsb temp digital output (binary) digital output (hex) +125 c 0 1111 1010 0fah +85 c 0 1010 1010 0aah +25.5 c 0 0011 0011 033h 0 c 0 0000 0000 000h 10.5 c 1 1110 1011 1ebh 25 c 1 1100 1110 1ceh 55 c 1 1001 0010 192h DS1724 071698 4/17 operationprogramming there are two areas of interest in programming the DS1724: configuration/status register, and the 2.57 kbit eeprom lut. all programming is done via the 1wire interface (dq pin) using the protocols dis- cussed in the a1wire bus systemo section. configuration/status register programming the configuration/status register is written to via the write status (0ch) function command. the factory default setting of the DS1724 has the analog output enabled and the part in a continuous temperature con- version mode. if the user wishes to alter these settings, it is done so using the write status command followed with data in the format shown below in figure. 2. this register can also be read using the read status (ach) command to determine the status of a temperature con- version or eeprom write. configuration/status register figure 2 tb msb lsb nvb x x x x vo? 1 shot 1shot = temperature conversion mode. if 1shot is a1o, the DS1724 will perform one temperature conver- sion upon reception of the start convert t protocol. if 1shot is a0o, the DS1724 will continuously perform temperature conversions. this bit is nonvolatile, and the factory default state is a0o (continuous conversion mode). vo? = analog output enable. if vo? = a1o (factory default state), the dac and thus the analog voltage out- put is enabled. if vo? = a0o, the dac is disabled, thus saving power. the v o pin should be left floating in this mode. the vo? bit is also nonvolatile. nvb = nonvolatile memory busy flag. a1o = copy from scratchpad to eeprom in progress; a0o = nonvolatile memory not busy. a copy to eeprom may take from 2 ms to 10 ms (taking longer at lower supply voltages). tb = temperature busy flag. a1o = temperature con- version in progress; a0o = temperature conversion com- plete. x = don't care 2.57 kbit eeprom lut programming the DS1724's eeprom lookuptable (lut) is orga- nized as shown in figure 3. the memory consists of a scratchpad ram and storage eeprom. the scratch- pad helps insure data integrity when communicating over the 1wire bus. data is first written to the scratch- pad (write scratchpad (4eh) command) where it can be read back (read scratchpad (beh) command). after the data has been verified, a copy scratchpad (48h) command will transfer the data to the corresponding eeprom page. this process insures data integrity when modifying the memory. the DS1724's memory is organized as 2,570 bits of eeprom, in 33 80bit pages. each page defines the 10bit analog voltage for eight 0.5 c temperature incre- ments. (the first page has 60 bits of userdefinable space. the last page contains 70 bits of undefined space that will read as all 1's.) table 3 shows the tem- perature ranges that are associated with each page. if any or all of the ranges will never be encountered in a particular application, that page can be used for general eeprom storage. DS1724 071698 5/17 temperature/page association table 3 page associated temperature range 00h 25 c to 24.5 c 01h 24.0 c to 20.5 c 02h 20.0 c to 16.5 c 03h 16.0 c to 12.5 c 04h 12.0 c to 8.5 c 05h 8.0 c to 4.5 c 06h 4.0 c to 5.0 c 07h 0.0 c to 3.5 c 08h 4.0 c to 7.5 c 09h 8.0 c to 11.5 c 0ah 12.0 c to 15.5 c 0bh 16.0 c to 19.5 c 0ch 20.0 c to 23.5 c 0dh 24.0 c to 27.5 c 0eh 28.0 c to 31.5 c 0fh 32.0 c to 35.5 c 10h 36.0 c to 39.5 c 11h 40.0 c to 43.5 c 12h 44.0 c to 47.5 c 13h 48.0 c to 51.5 c 14h 52.0 c to 55.5 c 15h 56.0 c to 59.5 c 16h 60.0 c to 63.5 c 17h 64.0 c to 67.5 c 18h 68.0 c to 71.5 c 19h 72.0 c to 75.5 c 1ah 76.0 c to 79.5 c 1bh 80.0 c to 83.5 c 1ch 84.0 c to 87.5 c 1dh 88.0 c to 91.5 c 1eh 92.0 c to 95.5 c 1fh 96.0 c to 99.5 c 20h 100.0 c each temperature increment is programmed with the binary equivalent (5 mv lsb) of the desired voltage out- put if that particular temperature is measured by the DS1724. a dc offset of 1.280v is added to the voltage represented by the binary equivalent to arrive at the analog voltage out, v o . table 4 below illustrates the exact relationship between the 10bit word pro- grammed into a given temperature increment and the voltage output, should the DS1724 measure that tem- perature. voltage/data relationships table 4 msb lsb (unit = 5 mv) 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 lsb 2 9 2 0 programmed word voltage equivalent of programmed word analog voltage out 00 0000 0000 0.000v 1.280v 00 0000 0001 0.005v 1.285v 00 0011 0010 0.250v 1.530v 00 1100 1000 1.000v 2.280v 01 1111 0100 2.500v 3.780v 10 1100 0111 3.555v 4.835v 11 1111 1111 5.115v 6.395v operation analog voltage temperature sensor the DS1724 outputs the measured temperature as a 9bit digital word (see aoperation digital tempera- ture sensoro section) and as an analog voltage. the v vs. t profile of the analog output depends upon the map programmed in the 2.57 kbit eeprom lut. the mini- mum voltage step between 0.5 c temperature incre- ments is 5 mv. the output (v o ) can range from 1.280v to 6.395v. additional analog voltage temperature sensor information to be provided. DS1724 071698 6/17 eeprom lookup table map figure 3 page 00h user 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 user 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 user 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 user 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 user 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 msb 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 25.0 c 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 24.5 c 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 lsb user page 01h 24.0 c 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 23.5 c 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 msb 21.0 c 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 20.5 c 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 lsb 23.0 c 22.5 c page 02h 20 c 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 19.5 c 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 msb 17.0 c 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 16.5 c 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 lsb 19.0 c 18.5 c page 07h 4.0 c 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 msb 0.5 c 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 lsb page 08h 0.0 c 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 msb 3.5 c 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 lsb page 1fh 96.0 c 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 msb 99.5 c 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 lsb page 20h 100.0 c 2 9 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 msb lsb xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx DS1724 071698 7/17 1wire bus system the 1wire bus is a system that has a single bus master and one slave. the DS1724 behaves as a slave. the DS1724 is not able to be multidropped, unlike other 1wire devices from dallas semiconductor. the dis- cussion of this bus system is broken down into three top- ics: hardware configuration, transaction sequence, and 1wire signaling (signal types and timing). hardware configuration the 1wire bus has only a single line by definition; it is important that each device on the bus be able to drive it at the appropriate time. to facilitate this, each device attached to the 1wire bus must have open drain or 3state outputs. the 1wire port of the DS1724 (dq pin) is open drain with an internal circuit equivalent to that shown in figure 4. the 1wire bus requires a pullup resistor of approximately 5k w . hardware configuraiton figure 4 +5v r x t x r x t x 1oo ohm mosfet DS1724 1wire port bus master 5 m a typ. r x = receive t x = transmit 4.7k w the idle state for the 1wire bus is high. if for any rea- son a transaction needs to be suspended, the bus must be left in the idle state if the transaction is to resume. infinite recovery time can occur between bits so long as the 1wire bus is in the inactive (high) state during the recovery period. if this does not occur and the bus is left low for more than 480 m s, all components on the bus will be reset. transaction sequence the protocol for accessing the DS1724 via the 1wire port is as follows: ? initialization ? memory function command ? transaction/data initialization all transactions on the 1wire bus begin with an initial- ization sequence. the initialization sequence consists of a reset pulse transmitted by the bus master followed by presence pulse transmitted by the slave. the presence pulse lets the bus master know that the DS1724 is on the bus and is ready to operate. for more details, see the a1wire signalingo section. memory command functions the following command protocols are summarized in table 5. write scratchpad [4eh] this command writes to the scratchpad of the DS1724. the entire 80bit scratchpad space may be written, but all writing begins with the byte present at address 0 of the selected scratchpad. writing may be terminated at any point by issuing a reset. read scratchpad [beh] this command reads the contents of the scratchpad on the DS1724. after issuing this command, the user may begin reading the data, always beginning at address 0 of the selected scratchpad. the user may read through the end of the scratchpad space, with any undefined data bits reading all logic 1's and after which the data read will be all logic 1's. if not all locations are to be read, DS1724 071698 8/17 the master may issue a reset to terminate reading at any time. copy scratchpad [48xxh] this command copies the scratchpad into the eeprom memory page xxh of the DS1724. after issuing this command, the user must write a page number to direct which page of memory the scratchpad is to be copied. valid page numbers are 00h 20h. if the bus master issues read time slots following this command, the DS1724 will output a0o on the bus as long as it is busy copying the scratchpad to eeprom; it will return a a1o when the copy process is complete. recall memory [b8xxh] this command recalls the stored values in eeprom page xxh to the scratchpad. this command must pro- ceed a read sp command in order to read any page of memory on the DS1724. no data is available directly with a read sp command. valid page numbers are 00h 20h. write status [0ch] this command writes to the status/configuration regis- ter. it is used if the user wishes to change the operating mode of the DS1724. after issuing the command, the bus master must follow with 8 bits of data. see the acon- figuration/status register programmingo section for the formatting of this register. read status [ach] the command reads the status/configuration register, informing the bus master of conversion and eeprom write cycle status. after issuing this command, the bus master issues 8 read slots. start convert t [44h] this command begins a temperature conversion. no further data is required. in the oneshot mode, the tem- perature conversion will be performed and the DS1724 will return to a standby state. in the continuous conver- sion mode, this command will initiate continuous con- versions. if the bus master issues read time slots follow- ing this command, the DS1724 will output a0o on the bus as long as it is busy making a temperature conversion; it will return a a1o when the temperature conversion is complete. read temperature [aah] this command reads the contents of the register that contains the last completed temperature conversion. the bus master must issue nine read slots after issuing this protocol. stop convert t [22h] this command stops a temperature conversion. no fur- ther data is required. the command may be used to halt a DS1724 in a continuous conversion mode. after issu- ing the command, the current conversion in progress will be completed, and then the DS1724 will remain idle until a start convert t is issued to resume continuous operation. DS1724 071698 9/17 DS1724 command set table 5 instruction description protocol 1wire bus master status after issuing protocol 1wire bus data after issuing protocol memory commands read scratchpad reads bytes from DS1724 scratchpad beh rx DS1724 071698 10/17 sample command sequence table 6 example: bus master configures the DS1724 for continuous conversions, initiates a temperature conversion, and reads the digital output. master mode data (lsb first) comments tx reset reset pulse rx presence presence pulse tx 0ch write status tx 02h enables v o and configures for continuous conversions tx reset reset pulse rx presence presence pulse tx 44h initiates temperature conversions tx reset reset pulse rx presence presence pulse tx aah read temperature register tx <9 read slots> read the 9 bits of the last completed temperature conver- sion tx reset reset pulse rx presence presence pulse, done DS1724 071698 11/17 i/o signaling the DS1724 requires strict protocols to insure data integrity. the protocol consists of several types of signaling on one line: reset pulse, presence pulse, write 0, write 1, read 0, and read 1. all of these signals, with the exception of the presence pulse, are initiated by the bus master. the initialization sequence required to begin any com- munication with the DS1724 is shown in figure 5. a reset pulse followed by a presence pulse indicates the DS1724 is ready to send or receive data given a valid memory function command. the bus master transmits (tx) a reset pulse (a low sig- nal for a minimum of 480 m s). the bus master then releases the line and goes into a receive mode (rx). the 1wire bus is pulled to a high state via the 5k w pullup resistor. after detecting the rising edge on the i/o pin, the DS1724 waits 1560 m s and then transmits the presence pulse (a low signal for 60240 m s). initialization procedure areset and presence pulseso figure 5 master t x areset pulseo 480 m s minimum 960 m s maximum master r x 480 m s minimum v cc gnd DS1724 waits 15 60 m s DS1724 t x apresence pulseo 60 240 m s line type legend: bus master active low both bus master and DS1724 active low DS1724 active low resistor pullup 1wire bus DS1724 data is read and written through the use of time slots to manipulate bits and a command word to specify the transaction. write time slots a write time slot is initiated when the host pulls the data line from a high (inactive) logic level to a low logic level. there are two types of write time slots: write one time slots and write zero time slots. all write time slots must be a minimum of 60 m s in duration with a minimum of a 1 m s recovery time between individual write cycles. the DS1724 samples the i/o line in a window of 15 m s to 60 m s after the i/o line falls. if the line is high, a write one occurs. if the line is low, a write zero occurs (see figure 10). for the host to generate a write one time slot, the data line must be pulled to a logic low level and then released, allowing the data line to pull up to a high level within 15 microseconds after the start of the write time slot. for the host to generate a write zero time slot, the data line must be pulled to a logic low level and remain low for the duration of the write time slot. read time slots the host generates read time slots when data is to be read from the DS1724. a read time slot is initiated when the host pulls the data line from a logic high level to logic low level. the data line must remain at a low logic level for a minimum of 1 m s; output data from the DS1724 is then valid within the next 14 m s maximum. the host therefore must stop driving the i/o pin low in order to read its state 15 m s from the start of the read slot. (see figure 6). by the end of the read time slot, the i/o pin will pull back high via the external pullup resistor. all read time slots must be a minimum of 60 m s in duration with a minimum of a 1 m s recovery time between individual read slots. figure 7 shows that the sum of t init , t rc , and t sample must be less than 15 m s. figure 8 shows that system timing margin is maximized by keeping t init and t rc as small as possible and by locating the master sample time toward the end of the 15 m s period. DS1724 071698 12/17 read/write timing diagram figure 6 1wire bus master write a0o slot master write a1o slot 60 m s DS1724 071698 14/17 absolute maximum ratings* voltage on v dd , relative to ground 0.3v to 7.0v voltage on any other pin, relative to ground 0.3 c to +7 c operating temperature 55 c to +125 c storage temperature 55 c to +125 c soldering temperature 260 c for 10 seconds * this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods of time may affect reliability. recommended dc operating conditions ( 25 c to +85 c, 2.7v v dd 5.5v) parameter symbol condition min typ max units notes supply voltage v dd 2.7 5.5 v 1 data pin dq 0.3 5.5 v 1 dc electrical characteristics ( 25 c to +85 c, 2.7v v dd 5.5v) parameter symbol condition min typ max units notes input logic high v ih 2.0 v 1 input logic low v il 0.3 0.8 v 1 standby current i dd1 dq = 1 5 10 m a 2, 3 active current i dd temperature conversion or eeprom write in progress 250 1000 m a 3 input resistance r i dq 500 k w 4 electrical characteristics: digital thermometer ( 25 c to +85 c, 2.7v v dd 5.5v) parameter symbol condition min typ max units notes thermometer error (t actual t measured ) t err 0 c to 70 c tbd c 5 resolution 9 bits conversion time t convt 400 1000 ms electrical characteristics:analog thermometer dac ( 40 c to +85 c, 2.7v v dd 5.5v) parameter symbol condition min typ max units notes tbd tbd tbd tbd tbd tbd tbd tbd DS1724 071698 15/17 ac electrical characteristics: 1wire interface ( 25 c to +85 c, 2.7v v dd 5.5v) parameter symbol condition min typ max units notes time slot t slot 60 120 m s recovery time t rec 1 m s write 0 low time t low0 60 120 m s write 1 low time t low1 1 15 m s read data valid t rdv 15 m s reset time high t rsth 480 m s reset time low t rstl 480 m s presence detect high t pdh 15 16 m s presence detect low t pdl 60 240 m s dq capacitance c dq 25 pf notes: 1. all voltages are referenced to gnd. 2. shutdown and standby currents specified for the range 0 c to 70 c. 3. i dd specified with v dd = 5.0v. 4. input load is to gnd. 5. see typical curve for thermometer specification limits beyond 0 c to 70 c range. DS1724 071698 16/17 timing diagrams figure 9 1wire write one time slot start of next cycle t rec t low1 t slot 1wire write zero time slot start of next cycle t rec t slot t low0 1wire read zero time slot start of next cycle t rec t slot t rdv 1wire reset pulse presence detect 1wire presence detect t rstl t rsth t pdhigh t pdlow DS1724 071698 17/17 typical thermometer performance curve figure 10 t b d |
Price & Availability of DS1724
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |